发明名称 SWITCHING SYSTEM
摘要 <p>PURPOSE:To accommodate outgoing lines with various transmission line speeds by providing a multiplexer or a demultiplexer to an output link. CONSTITUTION:An ATM switch 1 comprising a multiplexer 12, a common buffer memory 11, a demultiplexer 13, and a buffer memory control circuit 10 managing a buffer for each cell type is provided with a band control table 104 commanding the kind of a cell read from a buffer. Thus, the cell kind is managed corresponding to an outgoing line and the cell type is commanded in a read timing corresponding to each outgoing line in the band control table, and various outgoing lines with different transmission speeds are accommodated by providing a multiplexer or a demultiplexer to an output link of the switch.</p>
申请公布号 JPH04276943(A) 申请公布日期 1992.10.02
申请号 JP19910038388 申请日期 1991.03.05
申请人 HITACHI LTD 发明人 OZAKI NAOHIKO;YANAGI JUNICHIRO;TORII YUTAKA;AOKI KAORU;AIKI KIYOSHI
分类号 H04J3/24;H04L12/56;H04Q11/04 主分类号 H04J3/24
代理机构 代理人
主权项
地址