发明名称 CLAMPING CIRCUIT
摘要 PURPOSE:To eliminate distortion at clamping by connecting the collector of a clamping transistor(TR) to its bias circuit. CONSTITUTION:The collector of a TR 5 is connected between the resistors 2 and 3 of a bias circuit. Upon the receipt of a synchronous signal, the TR 5 is turned on, a circuit flows from its emitter to an input terminal 8 via a capacitor 6 and the current flowing from the emitter passes almost them resistor 2 from a voltage terminal 1 and since it is equal to a current flowing to the collector, the base level of the TR 5 is lowered by (collector current)X(resistor 2) and the level decrease is transmitted as it is to a signal processing section 9. Then the voltage drop of the (collector current)X(resistor 2) is made coincident with the voltage drop of (emitter current)X(resistor 7). Thus, the distortion of the synchronous signal is eliminated.
申请公布号 JPH02237272(A) 申请公布日期 1990.09.19
申请号 JP19890057027 申请日期 1989.03.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MATSUMOTO TOSHIHIKO
分类号 H04N5/16;H03K5/00;H03K5/007 主分类号 H04N5/16
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