| 摘要 |
PURPOSE:To attain high speed accessing by means of continuous address including error correction, by reading out the information of partial write address in the nipple mode system and performing write when this address is restored next. CONSTITUTION:A storage section 2 is accessed continuously in response to a continuous address signal 9 and a readout/write control signal 10 based on two sets of clocks from a memory control section 1 and operated in high speed in the nipple mode. The readout in the partial write operation of the storage section 2 is done at an address in response to the 2nd clock and the data of error correction coding is stored in a data control section 3 in response to a data control signal 11 from the control section 1. The continuous readout, write and dummy access are done with a succeeding address and when the address is restored to the partial write address, the control section 3 corrects error of the partial readout data based on a check bit from the write data 7 and rewrites data in the memory section 2. Thus, high speed accessing by the continuous address including error correction is attained. |
