发明名称 Multiplication circuit
摘要 The multiplication circuit according to the subject of the invention is a position multiplication circuit, which processes binary coded decimal digits, and forms the product 9 . 9 = 81 at maximum. In the normal case, the product consists of two partial products, which are added together in a suitable adder circuit. The main partial product equals the number of 5 . 1 basic partial products times 5. The number of 5 . 1 basic partial products is supplied by the special adder circuit (5), which has a specially triggered fives input. The output number of circuit (5) is multiplied by 5 in circuit (1). The additional partial product is supplied by a residual fixed value circuit (2), which supplies the residual product 4 . 4 = 16 at maximum. The value 5 of circuit (1) is processed in the dual half adder (7). The value 10 of circuit (3) is processed in the second adder circuit (6). <IMAGE>
申请公布号 DE3907685(A1) 申请公布日期 1990.09.13
申请号 DE19893907685 申请日期 1989.03.09
申请人 MERKLE, PAUL, 7032 SINDELFINGEN, DE 发明人 MERKLE, PAUL, 7032 SINDELFINGEN, DE
分类号 G06F7/491;G06F7/52 主分类号 G06F7/491
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