| 摘要 |
PURPOSE:To simultaneously execute field delay and frame delay by providing two vertical pulse generation circuits, supplying a first vertical pulse to a first memory and supplying a second vertical pulse to a second memory respectively. CONSTITUTION:In the frame delay, the signal of a sampling frequency is outputted from a logical gate 117 only by a video period in a horizontal direction. A gate pulse by the video period in a vertical direction is outputted from a latch circuit 115. Those clocks are gated by logical gates 120 and 121 and inputted to memories 108 and 109. Next, concerning the field delay, the output of a logical gate 118 is inputted to a memory 110. The clocks, for which a vertical position is deviated by one line for each frame, by the video period in the horizontal and vertical direction are inputted to the memory 110. Thus, one frame delay data can be obtained from the memories 108 and 109 and one field delay data can be obtained from the memory 110. |
