发明名称 INTEGRATED CIRCUIT OBTAINED FROM WAFER HAVING IMPROVED FLATNESS
摘要 PURPOSE: To eliminate a groove formed by lapping to enhance the flatness of the surface of a wafer by a method wherein an etching-resisting coating is formed on a recessed surface of the wafer, the coating is isotropically etched and the left coatings and the like are removed. CONSTITUTION: The surface of a wafer 10 comprising a pit 12, such as a groove, and the like, which are formed by lapping, is coated with an etching-resisting material, such as a silicon nitride film, to form an etching-resisting coating 21. The, the flat part of the coating 21 is removed to perform an isotropic etching on the coating 21 and coatings 32 and 33 left by undercutting are removed. Whereupon, a projection 51 only is left. When this projection 51 is removed by a polishing work, the pit is eliminated by lapping or an etching work and the flatness of the surface of the wafer 10 is enhanced.
申请公布号 JPH02226723(A) 申请公布日期 1990.09.10
申请号 JP19890331425 申请日期 1989.12.22
申请人 AMERICAN TELEPH & TELEGR CO <ATT> 发明人 JIEFUREI TEE KOZE;ANTON YOHAN MIRAA
分类号 H01L21/304;H01L21/306;H01L21/3105 主分类号 H01L21/304
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