发明名称 DATA PROCESSING SYSTEM FOR HIGH PERFORMANCE EXECUTION OF INSTRUCTION
摘要 PURPOSE: To improve the throughput of a system by executing instructions by a production pipeline system by the respective elements of a central processing unit (CPU). CONSTITUTION: This system is provided with the CPU 2, a virtual memory management unit(VMMU) 4, a cache device 6, a memory sub system 8 and an input/output peripheral device 10, constituted as a production line system and provided with many devices for executing respective different operation for the respective instructions passed through a production pipeline. Then, a certain kind of the instruction is executed by the device of an upper stage and dropped from the production line, it releases the device of the upper stage so as to execute the succeeding instruction and the other kind of the instruction is executed at the end of the production line. Thus, the entire throughput of the system is improved.
申请公布号 JPH02224124(A) 申请公布日期 1990.09.06
申请号 JP19890329412 申请日期 1989.12.19
申请人 BURU H N INF SYST INC 发明人 MINNTSUZAA MIU;TOOMASU EFU JIYOISU
分类号 G06F9/38 主分类号 G06F9/38
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