A fast settling voltage to frequency converter for high speed analog to digital conversion.

摘要

A circuit arrangement reduces the time necessary for a voltage-to-frequency converter to provide a new output frequency in response to a change in input voltage levels. A current source (34) provides additional input current to the input integrating node of the v/f (22) before a conversion is requested. When a conversion is requested, the additional input current effectively provides operation of the v/f (22) at an increased frequency, thus speeding the settling process therefor. When the integrator of the v/f is at a predetermined voltage level in a predetermined operating cycle, the current source is removed, thus terminating the increased frequency of operation.