发明名称 PHASE LOCKED LOOP OSCILLATOR
摘要 PURPOSE:To continuously hold frequency equal to the preceding one even after a fault is generated in an input signal by detecting the fault of the input signal, generating a selection signal and switching a frequency dividing circuit. CONSTITUTION:An input fault detecting circuit 2 detects the fault of an input signal and generates a selection signal. A selecting circuit 4 applies an output signal from a 2nd frequency dividing circuit 3 to a phase comparator 1 as an input signal during the normal period of the input signal,. and during the generation of a fault in the input signal, supplies an output signal from a 3rd frequency dividing circuit 8 based upon the selection signal. A switching circuit 5 supplies an output signal from a circuit 4 to a circuit 8 as a frequency division control signal during the normal period of the input signal, and during the generation of the fault in the input signal, supplies the output signal to the 2nd frequency dividing circuit 3 based upon the selection signal. Consequently, frequency equal to the preceding one can be continuously held even after generating the fault in the input signal to be a reference, and when the input signal is regenerated, the current state can be restored to normal operation without executing unnecessary frequency variation.
申请公布号 JPH02217018(A) 申请公布日期 1990.08.29
申请号 JP19890037575 申请日期 1989.02.17
申请人 NEC CORP 发明人 MUTO HIROSHI
分类号 H03L7/14 主分类号 H03L7/14
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