Semiconductor memory having different read and write word line voltage levels

摘要

A Static Random Access Memory (SRAM) has a word line driving circuit responsive to a mode signal representative of a read-out mode or a write-in mode for supplying one of the word lines coupled to an accessed memory cell with a higher voltage level in the write mode than in the read mode. Each memory cell has a pair of memory transistors turned on or off in a complementary manner depending upon a data bit memorized therein and a pair of transfer transistors respectively coupled between the memory transistors and a pair of bit lines and gated by the word line. Each memory transistor has a decreased gate width by virtue of the word line driving circuit capable of producing the high or low voltage level, thereby allowing each memory cell to occupy a small area of the semiconductor substrate.