发明名称 ARITHMETIC UNIT
摘要 PURPOSE: To improve the processing efficiency by providing a result code selection device which is connected to a magnitude comparison mechanism and a code circuit and selectively supplies the sign digit of an operand A or B as a result sign in response to first and third result condition signals. CONSTITUTION: Acoden selection circuit 60 receives a sign control (SIGN CON TROL) signal from a signal line 52 and selectively supplied sign values of operands A and B to signal lines 61 and 63 as the result sign as one of operand signs. This selected sign (SIGN) is supplied to a SIGN part 22 of a register 20 through a signal line 65. It is desirable that the code selection circuit 60 exists as a part of a code circuit 50. Thus, result condition determination in execution of packed decimal operation processing is promoted to improve the processing efficiency.
申请公布号 JPH02213938(A) 申请公布日期 1990.08.27
申请号 JP19890328603 申请日期 1989.12.20
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 JIYON DEBUIDO JIYABATSUSHIYU;RINDA AN KABAKUSU;TEIMOSHIII JIERARUDO PURUZATSUKU;ROBAATO REISUTO RECHIYAADOSON
分类号 G06F7/38;G06F7/494;G06F7/50;G06F9/32 主分类号 G06F7/38
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