发明名称 MEASURING METHOD OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To enable measurement of the effect of a trench stress on a P-N junction leak of a diffused layer of a trench lateral wall separately from the effect of an ion implantation damage on the occasion of formation of another diffused layer by obtaining electric connection between the diffused layers of trench inner walls by forming a channel in an element region between trenches by a field effect. CONSTITUTION:On the occasion when electric measurement is conducted with respect to a P-N junction of a plurality of trenches 1 formed adjacently on an element region of a semiconductor substrate 10 and each having a diffused layer 2 constituting the aforesaid P-N junction in the inner wall, a channel is formed in the element region between the trenches 1 by a field effect and thereby electric connection between the diffused layer 2 on the inner walls of the trenches 1 is obtained. On the occasion when a P-N junction leak of an N<+> diffused layer 2 on a trench lateral wall is measured by using a measuring pattern having no surface N<+> diffused layer between the trenches 1, for instance, a positive voltage is impressed on a plate electrode 4 of a trench capacitor, an N-channel is induced under a capacitor insulation film 3 on the surface, an N<+> diffused layer 7 under a contact and the N<+> diffused layers 2 of a plurality of trench lateral walls are connected thereby electrically, and the effect of a trench stress on a P-N junction leak is measured.
申请公布号 JPH02213162(A) 申请公布日期 1990.08.24
申请号 JP19890034003 申请日期 1989.02.14
申请人 MATSUSHITA ELECTRON CORP 发明人 KOIKE NORIO
分类号 H01L27/04;H01L21/66;H01L21/822;H01L21/8242;H01L27/10;H01L27/108 主分类号 H01L27/04
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