发明名称 MANUFACTURE OF MIS SEMICONDUCTOR DEVICE
摘要 PURPOSE:To realize a highly integrated memory by using three or more masks having different mask patterns from one another for providing a plurality of gate electrodes. CONSTITUTION:By means of an ion implantation technique or the like, a plural ity of doped layers 6, 7 are formed by diffusion for controlling two different threshold values of gate electrodes. First gate electrodes 9 are formed through a first gate insulating film 8 by using a mask pattern adapted such that the first gate electrodes are formed on every other doped layers 6 and 7. Then, by using a second mask pattern, second gate electrodes 11 are formed on every other layers on which the first gate electrodes have not been formed, through a gate insulating film 10. Finally, by using a third mask pattern, third gate electrodes 14 are formed on the rest of the doped layers through a third gate insulating film 13. In this manner, memories can be integrated at a high density at good yield.
申请公布号 JPH02210868(A) 申请公布日期 1990.08.22
申请号 JP19890029986 申请日期 1989.02.10
申请人 MATSUSHITA ELECTRON CORP 发明人 SHIMAZAKI TOYOYUKI
分类号 H01L27/112;H01L21/8246 主分类号 H01L27/112
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