| 摘要 |
PURPOSE:To insure the fast operating function of a synchronous logical circuit device by providing a DFF which inputs the external output signal of a synchronous logical circuit block and its synchronizing clock and outputting the output signal of the DFF. CONSTITUTION:The external output signal 38 from the synchronous logical circuit block 1 varies in synchronism with the leading (trailing) edge of the synchronizing clock S3 and is passed through circuits 2 - 6 incorporated in the block 1, so the signal varies while delayed by a propagation delay time. The DFF8 of the redundancy circuit uses a clock S3 as its clock signal. A signal S8 which is a data input at the timing where an edge of the clock S3 is inputted is data before variation by the DFF8, so the output signal S9 of the DFF8 holds the data before the variation until a next edge of the clock S3 arrives even after the output S8 varies by the propagation delay time later. Consequently, the signal level of the block 1 at fixed time and the signal level which is one cycle of the clock S3 before can be monitored at the same time. |
