| 摘要 |
Computer interface apparatus which provides for an efficient computer interface that transfers control and data signals using a variety of communications protocols between a signal processor and external devices coupled thereto. The interface (11) comprises a plurality of control and data transfer ports, including one serial (120) and four configurable parallel ports (122, 124, 126, 128). A plurality of controllers (130, 132) interface with the signal processor to direct the flow of control and data signals between devices. In addition, and in order to increase the speed of operation of the interface, circuitry is also disclosed which controls tristate buffers on the control and data buses coupled to the serial and parallel ports (120, 122, 124, 126, 128), which circuitry provides for open-collector characteristics, without sacrificing tristate buffer speed. |
