发明名称 Interprocessor data transfer system and method.
摘要 <p>A system and method for managing a FIFO queue to allow tentative enqueuing of data entities. Additional memory pointers and control logic are provided to allow data entries to be added to a FIFO queue conditionally. Combinatorial logic allows the FIFO queue to be managed so that the tentative or conditional data entries may be purged as a group, committed or made permanent as a group. This system allows an increase in pipeline processor information transfer when several data entities to be transferred are related and the commitment to transfer the group cannot be made until after one or more of the group of data entities have been processed. Selector control are provided so that a system developer can implement management schemes to ensure that the desired function is implemented.</p>
申请公布号 EP0382699(A2) 申请公布日期 1990.08.16
申请号 EP19900850052 申请日期 1990.02.06
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 NUECHTERLEIN, DAVID WILLIAM;RINALDI, MARK ANTHONY
分类号 G06F15/16;G06F5/10;G06F15/167;G06F15/177 主分类号 G06F15/16
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