| 摘要 |
PURPOSE:To obtain a device having a synchronizing function requested at parallel synchronizing operation, by providing a control circuit which increases a count set value of a counter through the input of a synchronizing instruction signal and outputs a synchronizing signal at the count of increment. CONSTITUTION:A control circuit which increases a count set value of a counter through the input of a synchronizing instruction and outputs a synchronizing signal at the count of increment is provided. For example, an original transmission clock CLK is produced with a transmission circuit 1 and inputted to a frequency division circuit 2, a clock pulse Cp obtained through the frequency division is counted at a counter 3 and the count output is inputted to a control circuit 4. When the count output reaches a predetermined count set value, a reset signal RD is applied from the control circuit 4 to the counter 3. When the synchronizing signal SYNC is inputted to the control circuit 4, a signal HF is applied from the control circuit 4 to the frequency division circuit 2 to speed up the clock pulse Cp and to change the period of a reset signal RD, and a synchronizing signal W1 is produced from the control circuit 4. |
