发明名称 MANUFACTURE OF MULTILAYER INTERCONNECTION STRUCTURE
摘要 Prodn. of insulating layer with flat plane comprises the steps of: coating of the soln. of silylated low alkyl polysilsesquinoxane of formula (I) onto the circuit board having step difference of height; drying the solvent; melting the low alkyl polysilsesquinoxane to form a flat polymer plane; and curing the polymer. In the formula, R is methyl or ethyl; n= 50-2000. Pref. the silylated low alkyl polysilsesquinoxane is methyl polysilsesquinoxane having trimethysill terminating gp. and its ave. Mw is 7.0 x 103-2.7 x 105.
申请公布号 KR900005894(B1) 申请公布日期 1990.08.13
申请号 KR19870014659 申请日期 1987.12.21
申请人 FUJITSU CO., LTD. 发明人 HUKUYAMA SUNICHI;YONEDA YASUHIRO;MIYAGAWA MASASHI;NISHI GODA;MATCHUURA ACHUMA
分类号 H05K3/02;(IPC1-7):H05K3/02 主分类号 H05K3/02
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