| 摘要 |
PURPOSE:To shorten a true around time (TAT) in a ROM having a train of FETs connected in series between word lines by dividing a first wiring pattern on an insulating film as required by means of a second wiring pattern. CONSTITUTION:A first wiring pattern 10 to be programmed is provided on an insulating film which covers word lines W1-W4 and selection lines SL1, SL2 and has an opening 11 over source and drain region of MISFETs Q1-Q8, T2 and T4 connected in series. The pattern 10 is divided by etching the same with a second pattern defined by a resist mask 14. Since a relatively coarse pattern can be used as this second pattern, the program can be written in with increased tolerance for master deviation and, thus, the true around time(TAT) can be shortened substantially. |
