| 摘要 |
<p>PURPOSE:To assure large capacity of a tile device by disposing part of a bonding pad for signals to peripheral circuits and for a power supply in a bonding pad region located outside a divided circuit block along a short side of the block. CONSTITUTION:Cell array regions 1-1, 1-2 are provided on the left and right sides of a semiconductor memory device formed on a rectangular semiconductor substrate, between which a peripheral circuit region 2 is then provided, and a bonding pad is provided outside the respective array regions 1-1, 1-2. Therefore, a distance between the peripheral circuit region 2 and power supply pads P8, P16 is substantially halved compared with prior cases, and the width of a power line connecting between the peripheral circuit 2 and the power supply pads P8, P16 may also be halved with a consideration of a resistance, and hence the number of the power, supply lines passing through regions X' and Y' is also reduced to 1/2. Hereby, total signal line width outside the cell array region can be reduced to realize a title device which is made large capacity.</p> |
