| 摘要 |
PURPOSE:To attain the continuous use of an arithmetic unit as well as the check of an arithmetic function by providing plural arithmetic circuits of the same function within the arithmetic unit. CONSTITUTION:An operation I0 is started at a time point T0 when an arithmetic unit is not used for a continuous operation. In such a case, a corresponding operand O0 is fetched to registers 12a and 12b since registers 12a, 12b, 13a and 13b are all idle. Then arithmetic circuits 13a and 13b perform operations respectively. The results of these operations are held at a register 16 via a selection circuit 15, and at the same time the parities are produced from the arithmetic results by parity generating circuits 14a and 14b respectively. These parities are compared with each other by a comparator 17, and the result of this comparison is fetched by a register 18. Two machine cycles are needed for a period between the arithmetic start and the fetching of the check result. Therefore, the hardware of double structure is used in case the instruction for use of the arithmetic unit has an interval of >=1 instruction. Thus the function check is possible for the arithmetic circuit. |
