发明名称 METHOD FOR EXECUTING TEST FOR INFORMATION PROCESSOR
摘要 PURPOSE:To shorten a maintenance time by testing all architectures when the execution architecture of a system is not decided, and after determining the execution architecture of the system, executing only a test corresponding to the architecture. CONSTITUTION:The areas of an external storage device 7 are referred at the time of executing the test of an arithmetic processor 2, and when execution architecture information is not stored, n groups of test monitors 7a1 to 7n1 and test parts 7a2 to 7n2 are executed. When the execution architecture information is stored, one group of the test monitor and the test part corresponding to the information are executed. Namely, all the architectures are tested when the execution architecture of the system is not decided, and after determining the architecture, only the test corresponding to the architecture is executed. Consequently, a redundant test execution can be suppressed and the maintenance time can be shortened.
申请公布号 JPH02189640(A) 申请公布日期 1990.07.25
申请号 JP19890010537 申请日期 1989.01.18
申请人 NEC CORP 发明人 KOBAYASHI SHINICHI
分类号 G06F11/22 主分类号 G06F11/22
代理机构 代理人
主权项
地址