| 摘要 |
PURPOSE:To obtain a signal detection circuit which can detect address signals in arbitrary number, by changing the number of stages of shift registers and feedback circuits according to a control signal. CONSTITUTION:When control signals 10m-1-102 are all ''0'', the generating polynomial is 1+X+X<2> and when ''1'', the polynomial is 1+X<i>+X<m>, where m is the number of stages of shift register and (i) is the number of stages of feedback circuits. Further, when the control signals 10m-1-10m+j are ''1'', control signals 10m+j+1-102 are ''0'' and 13m-3-13m+j are ''1'', then the polynomial is 1+X<i>+X<j> (where; i<j<m). Since the output of a descrambler is ''1'' or ''0'', the types of signals to be detected are m(m-1) and the signals excluding the number of mode codes and loop constituting codes are used as address signals. |
