| 摘要 |
A synchronous counter operating from a fixed frequency time base senses the data rate of an incoming bit stream and provides a time base synchronized with the incoming data. Detection of the data rate is accomplished in real time without software or user intervention. A two-stage counter, clocked by a crystal oscillator, is triggered by transitions of bi-phase data pulses. The circuit automatically shifts the frequency of operation to conform to the incoming data rate and returns to the high speed mode upon the cessation of low speed data rates. |
