| 摘要 |
PURPOSE:To efficiently utilize a memory and to rapidly execute information processing by storing a header formed by the 1st processing means and an information field protocol-processed by the 2nd processing means in a common storage means. CONSTITUTION:When frame information is transferred from a transfer control processing part 10 to a transmission frame memory 23 in an inter-processor common memory 20, a microprocessor(muP) 13 writes the leading address of the information and the number of bytes in a PR2 interruption control part 24. The control part 24 executes the interruption processing of the muP 31 in a protocol processing part 30. The muP 31 inputs the contents of the information field of the frame information in a memory part 33 and executes the protocol processing of the contents of the information field. After ending the protocol processing of the muP 31, a memory access control part 32 writes the contents of the information field in a transmission frame memory 22 and writes the leading address of the written contents and the number of transfer bytes in a register of a PR1 interruption control part 21.
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