| 摘要 |
The device comprises an elementary detector for each pixel of the image to be processed and as many elementary processors as there are columns of pixels in the image. Registers R1 contain digital values representing these pixels either after a straightforward digitising procedure or after an intermediate step of a more complex procedure by convolving the pixels with a coefficient matrix specific to the chosen procedure. These registers are incremented by an arithmetic and logic unit 18 which receives information specific to the procedure to be executed from a register R3. The output buses B1 and B2 of the adjacent elementary processors provide the unit 18 with the digital values relating to the pixels processed in these processors for the convolution procedures. Application to the execution of operations on a captured image, such as digitisation, contours extraction, decomposition into spatial frequencies, geometrical transformations, etc. <IMAGE>
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