Monolithic semiconductor chip interconnection technique and arragement.

摘要

An interconnection arrangement (14) and technique for a single semiconductor chip (13) containing incomplete electric circuitry and having electric surface terminations (13 sec ) permitting said incomplete electric circuitry to be externally interconnected, the interconnection arrangement (14) being mountable on the semiconductor chip and capable of electrically communicating with the semiconductor chip through electric surface terminations (13 sec ,14 sec ) on the top surface (13 min ) of the semiconductor chip and on the bottom surface (14 min ) of the interconnection arrangement.