发明名称 CONTINUOUSLY ADAPTIVE PHASE LOCKED LOOP SYNTHESIZER
摘要 A synthesizer is disclosed in which error correction pulses from a phase detector (205) are separated into narrow pulse width and wide pulse width pulses. The wide pulse width pulses are coupled to the loop filter (233,235,237) to enable a rapid charge of the loop filter. The narrow pulse width pulses are filtered by a narrow bandwidth filter (225,226,227) before being applied to the loop filter thus enabling a slow charge of the loop filter. The narrow bandwidth filter is decoupled from the control line but referenced to the control line voltage by a buffer amplifier (259) to preserve the adaptive nature of the loop.
申请公布号 AU4759090(A) 申请公布日期 1990.06.26
申请号 AU19900047590 申请日期 1989.11.06
申请人 MOTOROLA, INC. 发明人 ALEXANDER W. HIETALA;STEVEN F. GILLIG
分类号 H03L7/18;H03L7/089;H03L7/10;H03L7/107;H03L7/183 主分类号 H03L7/18
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