| 摘要 |
PURPOSE:To achieve stable sampling of a servo signal in the entire time region, by feeding back up and down signals for each charging voltage in the integrated stage through an up/down counter and a register, to the servo system. CONSTITUTION:Up and down signals from a decision circuit 18 corresponding to each charging voltage and a referential clock 46 of the pulse width narrower than said charging voltage width are integrated for the predetermined time by a cuonter 52 through AND gates 48, 50. On the other hand set 58 and reset 56 signals are produced from a logic operating circuit 24 for every sampling interval DELTAT to set the count from the counter 52 in a register 54 then reset the counter 52 to upcount from the count (a) and to hold said count between (b) and (c) then to down count while after elapsing the interval DELTAT the count (d) is set in the register 54 by an output signal from the citcuit 24. Similar operations are followed to feed a servo signal during the sampling operatin to the servo system under the integrated state. |
