发明名称 TESTING CONSTRUCTION FOR MODULE FOR TESTING SIGNAL CHIP HAVING A PLURALITY OF DIFFERENT FUNCTION BLOCKS
摘要 PURPOSE: To perform a test efficiently by enabling a test interface logic means to generate an internal test signal for a selected functional block in response to a test starting signal. CONSTITUTION: Each of a plurality of different functional blocks 16-22 includes a test interface logic means 24 for communicating with a bus interface unit means 12. Also, an address decoder means 38 generates a selection signal for selecting the blocks 16-22 and at the same time generates a test register write signal for setting the selected blocks 16-22 to a test mode. Further, a test generation logic means 40 generates a test register access enable signal in response to a test register write signal. Then, the means 24 transfers direction information to a direction latch means by a bidirectional data bus in response to the test register access enable signal and a read signal and at the same time generates an internal test signal for the selected functional block in response to the test start signal.
申请公布号 JPH02154177(A) 申请公布日期 1990.06.13
申请号 JP19890256897 申请日期 1989.09.29
申请人 ADVANCED MICRO DEVICDS INC 发明人 MAIKERU EI NIKUSU
分类号 G01R31/26;G01R31/28;G01R31/317;G06F11/22;G06F11/273;H01L21/822;H01L27/04;H04M3/24;H04Q11/04 主分类号 G01R31/26
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