| 摘要 |
<p>PURPOSE:To perform high-speed reading-out operations on a semiconductor memory device by providing a potential holding means which holds the output potential of an inverter means in a sense amplifier. CONSTITUTION:A charge supply circuit 5 is connected with the output node N2 of an inverter 2. The circuit 5 has two NMOS transistors Q9 and Q10 connected in series between power supply potential Vcc and the node N2 and the gate of each transistor Q9 and Q10 is connected with the drain of each transistor. Each transistor Q9 and Q10 is turned on when the voltage across its source and gate exceeds a threshold voltage Vth and suppresses the rise of the voltage cross its source and drain over the threshold voltage. The circuit 5 prevents the potential at the node N2 from getting lower than the difference between the power supply potential Vcc and the sum of the threshold voltages of the two transistors Q9 and Q10. Therefore, high-speed reading-out operations become possible, since an amplifying means outputs more quickly amplified signals.</p> |
