| 摘要 |
PURPOSE:To easily test and evaluate a built-in ADC by deriving the digital value and synchronizing signal of an analog/digital converter ADC to an output terminal without operating a CPU by means of a test input terminal signal. CONSTITUTION:The title computer consists of a CPU 2, an ADC 3, a circumferential device 4, an output port 5, an AD conversion result holding register (ADCR) 6, a data bus 7, output buffers B101 to B10n, B201 to B20N, and B301 to B30N (an (n) is the resolution of the ADC 3, and an N is the bus width of the data bus 7), AND gates 8 and 11, OR gates 9, 10 and 12, and input gates G101 to G10N. By inputting the test signal from a test input terminal, the digital value and synchronizing signal of the ADC 3 can be derived to the output terminal without operating the CPU 2. Thus, the built-in ADC can be easily tested, and its characteristic can be easily evaluated. |
