| 摘要 |
<p>PURPOSE:To obtain an ECL master slave latch circuit which has a few number of gates and is operated with a single clock by operating ECL circuits with the ternary logic. CONSTITUTION:Level shift type ECL circuits 11, 12, and 13 are used and are operated with the ternary logic, and a master latch circuit where two ECL circuits 11 and 12 are subjected to crossing feedback is used to obtain complementary data input parts. That is, two level shift type ECL circuits 11 and 12 are used and crossing feedback is performed between respective output-side current switching paths to constitute a latch of the ternary logic, and this latch is coupled to a slave latch consisting of the single ECL circuit 13. Thus, the ECL master slave latch circuit is realized which has a few number of gates and is operated with the single clock.</p> |
