| 摘要 |
<p>PURPOSE:To considerably reduce the number of gates to integrate a circuit by operating ECL circuits with the ternary logic to constitute an ECL master slave latch circuit with scanner of four ECL circuits. CONSTITUTION:ECL circuits 31 and 32 constituting a master latch, an ECL circuit 33 constituting a slave latch, and an ECL circuit 34 constituting a scanning circuit are used. The signal given from the external is converted to a signal having a high logical level, whose value is higher than that of the high logical level of the supplied signal, by level shift type ECL circuits to couple ECL circuits. Thus, the ternary logic function operated in preference to the normal logic is realized in ECL circuits, and the number of gates of an ECL master slave latch circuit with scanner is reduced.</p> |
