发明名称 Fault tolerant system and method of majority voting.
摘要 <p>The invention relates to an apparatus for rendering a plurality of sub-data processing systems to a fault tolerant system and a method for majority voting, wherein input signals supplied to the plurality of redundant subsystems are input to an output selecting circuit after an output of a subsystem is changed from an output signal of a subsystem having a most reliable output signal to another output signal of another subsystem having a lower reliable output signal in turn using self-diagnosis and cross-diagnosis in each subsystem according to majority voting rules. The output selecting circuit outputs a signal selected by the majority voting rules based on the output signals from the subsystems.</p>
申请公布号 EP0366017(A2) 申请公布日期 1990.05.02
申请号 EP19890119509 申请日期 1989.10.20
申请人 HITACHI, LTD. 发明人 KANEKAWA, NOBUYASU;IHARA, HIROKAZU;KATO, HATSUHIKO
分类号 G06F11/18 主分类号 G06F11/18
代理机构 代理人
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