发明名称 Programmable semiconductor memory.
摘要 <p>A programmable semiconductor memory is disclosed in which memory cells (11) are divided into a plurality of series circuit units (10) arranged in matrix fashion and comprising some memory cells (11) connected in series. The memory cells (11) each consist of non-volatile transistors provided with a control gate electrode (25), a floating gate electrode (24) and an erase gate electrode (26). Column lines (12) are provided to which one end of each of the series circuit units (10) of the plurality of series circuit units (10) arranged in one column are connected in common. Row lines (14) are provided in common for the memory cells of the series circuit units (10) that are arranged in one row and are respectively connected to the control gate electrodes (25) of the memory cells in that row. A voltage by which the selected non-volatile transistor works in a saturation state is applied to the control gate electrode (25) of the selected transistor of a series circuit unit (10) by a row line (14), thereby injecting hot electrons from the semiconductor substrate into the floating gate electrode (26). Another voltage by which the non-selected non-volatile transistor works in a non-saturation operation is applied to the control gate electrodes (25) of the remaining non-volatile transistors of the series circuit unit (10). By sequentially selecting memory cells (11) in one series circuit unit (10), the sequential data writing operation is performed. The sequential data reading operation is performed in a similar manner.</p>
申请公布号 EP0365720(A1) 申请公布日期 1990.05.02
申请号 EP19880309994 申请日期 1988.10.24
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 MASUOKA, FUJIO C/O PATENT DIVISION
分类号 G11C7/12;G11C16/04;G11C16/10;G11C16/16;G11C16/26;G11C17/18;G11C7/10 主分类号 G11C7/12
代理机构 代理人
主权项
地址