发明名称 CIRCUIT AND METHOD FOR CONVERTING COMPLEMENT OF 2
摘要 PURPOSE:To simplify circuit constitution and to reduce the number of transistors to be used by providing a NOT circuit to invert a carry, and supplying the output of the NOT circuit to the input terminal on the other side of an AND circuit to the input terminal on one side of which an input code bit is supplied. CONSTITUTION:The carry of an adder 14 is supplied to the NOT circuit 15. The output of the NOT circuit 15 is inputted to the input terminal on the other side of the AND circuit 13. All inversion data go to 1s only when all data bits are 0s, and the carry 1 is generated since 1 is added on them by the adder 14. The carry 1 is inverted to 0 by the NOT circuit 15, and is supplied to the AND circuit 13, therefore, a code bit outputted from the AND circuit 13 goes to 0 even when the input code bit shows 1.
申请公布号 JPH02115925(A) 申请公布日期 1990.04.27
申请号 JP19880268290 申请日期 1988.10.26
申请人 NEC HOME ELECTRON LTD 发明人 SUGANO KOUICHIROU
分类号 G06F7/38;G06F7/508 主分类号 G06F7/38
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