发明名称 FOUR QUADRANT MULTIPLIER
摘要 PURPOSE: To eliminate DC voltage offsets by constituting transistors connected with the form of a gilbert cell as multi-emitter transistors. CONSTITUTION: The multi-emitter transistors with the same constitution are provided as the transistors T1-T4 and the respective emitters of the transistor T1 are connected to each emitter of the transistor T2 and the current input terminal of one controllable current source Is 21-22 altogether. Then, the current output terminal of the current source is connected to a reference potential (ground), a control input terminal is connected to a noninverted input terminal and the respective emitters of the transistor T3 are connected to each emitter of the transistor T4 and the current input terminal of one controllable current source Is 31-32 altogether. The current output terminal of the current source is connected to the reference potential (ground) and the control input terminal is connected to an inverted input terminal. Thus, the DC voltage offsets are eliminated.
申请公布号 JPH02113382(A) 申请公布日期 1990.04.25
申请号 JP19890222781 申请日期 1989.08.28
申请人 SIEMENS AG 发明人 RIHIARUTO SHIYUTETSUPU
分类号 G06G7/163;G06J1/00;H03C1/54;H03D1/22;H03D3/06;H03D13/00 主分类号 G06G7/163
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