THE SEMICONDUCTOR MEMORY DEVICE

摘要

The dynamic type semiconductor memory circuit includes a number of memory cell columns each comprising memory cells connected to a bit line. At least a dummy cell is connected to a bit line constituting a bit line pair with the bit line. A sense amplifier is connected between the two bit lines. At least a FET is provided for balancing the voltages of the two bit lines. A balance control circuit detects the termination of selection of a dummy word line which is provided for the control of the dummy cell and thereafter operating the FET.