发明名称 Dynamic random access memory device with staggered refresh
摘要 A dynamic random access memory (DRAM) comprises a divided plurality of memory array blocks. Each memory array block comprises a memory array having memory cells and a sense amplifier. In refresh operation, activating signals for activating each of the sense amplifiers are outputted. The output timings of the activating signals are different from each other, so that each of the sense amplifiers are activated at different timings. Consequently, a peak value of the current consumed by the activation of the sense amplifiers can be reduced.
申请公布号 US4912678(A) 申请公布日期 1990.03.27
申请号 US19880247286 申请日期 1988.09.22
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 MASHIKO, KOICHIRO
分类号 G11C11/401;G11C11/406 主分类号 G11C11/401
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