| 摘要 |
PURPOSE:To improve the exchange processing capability of a packet data by reading out with priority address information in the inside of a hardware pointer queue corresponding to a packet data with high priority, if any, when a processor reads out the hardware pointer queue. CONSTITUTION:A memory 12 stores each exchange processing wait queue from lots of kinds of packet data transferred from a subscriber for each data with different exchange processing priority in the descending order from the packet exchange processing with the highest priority depending on the kind. Plural hardware pointer queues 3-5 set a head address of a packet data for each exchange processing wait queue of the packet data. A processor 1 controls it that the address information stored in the inside of the hardware pointer queues 3-5 corresponding to the packet data with high priority is read with priority. Thus, the packet exchange processing capability is improved. |
