发明名称 TESTING SYSTEM FOR ROM COLLATING CIRCUIT
摘要 PURPOSE:To obtain a device which outputs high-reliability processing programs from ROMs by storing fixed patterns for a test of a collating circuit respectively in a couple of ROMs, and testing the collating circuit by the fixed patterns. CONSTITUTION:In a couple of ROMs, fixed patterns for a test of a collating circuit are stored and the collating circuit is tested by the fixed pattern. For example, address code for a collating-circuit testing is inputted to a terminal 1 and an address decoding circuit 2 decodes the input into a testing address, which is inputted to ROMs 9 and 10. By a testing address inputted next, fixed patterns 11 and 12 are read out of the ROMs 9 and 10 and compared with each other by a collating circuit 5. If the collation result shows coincidence, the collating circuit 5 outputs a coincidence signal to open a gate circuit 6, and a CPU8 is driven through a data driving circuit 7; when not, the collating circuit 5 sends out a dissidence signal to close the gate circuit 6, and the processing of the CPU8 is stopped.
申请公布号 JPS58102399(A) 申请公布日期 1983.06.17
申请号 JP19810202097 申请日期 1981.12.15
申请人 FUJITSU KK 发明人 MIYAZAKI MASARU;SASAKI TAKAHIRO;TODA JIYUNICHI
分类号 G06F12/16;G06F11/277 主分类号 G06F12/16
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