发明名称 INTERFACE CONTROLLER
摘要 PURPOSE:To execute the test of an error detecting circuit in operating by inserting an error spuriously to transmission data based on the error insertion command from a central processor and confirming the normalcy of a detector. CONSTITUTION:Error insertion is commanded from a central processor 21 during transmission of data, and an instruction decoding executing control circuit 9 inserts an error spuriously into an output data register 3 or an input data register 4 through an insertion instruction circuit 7 and an insertion executing circuit 6. When a detecting circuit 5 is normal, a state word is stored in a register 12, also the state word to indicate the fact that the error is being inserted is stored from a circuit 7, and since the executing control circuit 9 reports the content of the register 12 to the central processor 21, the normalcy of the error detecting circuit 5 is recognized by the device 21. A discriminating circuit 13 stops data transmission immediately through an interface control circuit 11 when the error detecting circuit 5 does not work normally. By such a constitution, the reliability of transmission data is improved.
申请公布号 JPH0264745(A) 申请公布日期 1990.03.05
申请号 JP19880217675 申请日期 1988.08.30
申请人 NEC CORP 发明人 UCHIDA AKIO
分类号 G06F11/22 主分类号 G06F11/22
代理机构 代理人
主权项
地址