发明名称 BIPOLAR LOGIC CIRCUIT
摘要 PURPOSE:To slow down the voltage drop time at an output terminal by conducting a 4th transistor(TR) in response to the conduction of 1st, 3rd TRs and extracting a base electric charge of the 1st TR through a resistor. CONSTITUTION:When a low level signal is inputted to a base of a Schottky barrier diode(SBD)npn TR4, SBDnpn TRs 6, 9 are conductive and an electric charge is supplied from the output terminal 3 to a base of an SBDpnp TR 9 through an SBDnpn TR 6 till the potential at the output terminal 3 drops to nearly 1.5V(VBE9+Vsat6+VSBD12) from a high level (nearly 3.5V), the base current of the SBDnpn TR9 is increased and the emitter voltage is increased by the increase. Thus, the voltage drop time at the output terminal 3 is controlled by the method in which an SBDnpn TR11 is conductive, the base charge of the SBDnpn TR6 is extracted by a share depending on a resistor 19 and the emitter area ratio of the SBDnpn TR9 and the SBDnpn TR11. Thus, the voltage drop time at the output terminal 3 is made slow without sacrificing the turn-on time of the SBDnpn TR9.
申请公布号 JPH0263214(A) 申请公布日期 1990.03.02
申请号 JP19880214307 申请日期 1988.08.29
申请人 MITSUBISHI ELECTRIC CORP 发明人 TAKI YOICHIRO
分类号 H03K19/088;H03K17/615 主分类号 H03K19/088
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