Self-timing analog-to-digital converting system.

摘要

A substantially constant current is divided between two lines in accordance with the relative values of an input voltage and a reference voltage respectively introduced to such lines. The currents through the first and second lines respectively charge first and second capacitances. The charges in the first and second capacitances respectively control the magnitudes of the currents flowing through first and second control members to charge the first and second capacitances. The control members are interconnected so that any difference between the flow of current through the control members and the associated capacitances becomes magnified. When the charge in an individual one of the capacitances reaches a particular value, a signal on an output terminal associated with the other capacitance changes from the first magnitude to a second magnitude. During this time, the signal associated with the first capacitance remains at substantially the first magnitude. A plurality of stages, including the comparators disccussed above, compare the input voltage with progressive values of the reference voltage. Such stages are connected to successive pairs of comparators to indicate, on the basis of the relative magnitudes of the voltages on the output terminals of such comparators, whether the reference voltage is greater than the input voltage for both comparators in such pairs. An output signal is produced by the plurality only when one pair of comparators provides an output indicating that the input voltage is between the reference voltages connected to that pair of comparators.