发明名称 MANUFACTURE OF MIS TYPE SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To reduce the power consumption of a mask ROM, prevent latchup, and improve the reliability of an integrated circuit by forming an MISFET having a second threshold value by implanting oxygen in the source region, the drain region, etc., of the MISFET having a first threshold voltage. CONSTITUTION:When a semiconductor integrated circuit provided with a non- volatile storage function composed of an MISFET is manufactured, an MISFET having a first threshold voltage and an MISFET having a second threshold voltage are arranged. The first MISFET is consti//tued of the following; a source.drain region 105 of high impurity concentration, and a semiconductor region 103 which is formed between the source.drain region 105 and a channel forming region and has the same conductivity type as the source.drain region 105 and a concentration lower than the region 105. The second MISFET is formed by implanting oxygen in the source region, the drain region or the low concentration semiconductor region 103 of the above MISFET. For example, the semiconductor region 103 is turned into a state 107 where silicon and silicon oxide are mixed, by performing annealing after oxygen 106 is introduced in the semiconductor region 103 in order to write data.
申请公布号 JPH0258267(A) 申请公布日期 1990.02.27
申请号 JP19880209037 申请日期 1988.08.23
申请人 SEIKO EPSON CORP 发明人 TANAKA KAZUO
分类号 H01L29/78;H01L21/8246;H01L27/112 主分类号 H01L29/78
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