| 摘要 |
PURPOSE:To reduce the chip area and to eliminate the need for the addition of other transistor(TR) for writing by omitting a conventional capacitor, and providing a couple of floating gate TRs and at least one switch element instead. CONSTITUTION:A memory cell 10 consists of a couple of inverters 140, 142 whose output terminal connects to other input terminal respectively, two switch elements (e.g., TRs) 12, 14 connecting between one input terminal of the inverter and two bit lines B/L, B/L' respectively and intermitted by a signal fed to a gate terminal G from a word line W/L and a couple of EPROMs 16, 18 (floating gate TRs) whose sources S are connected, whose drain D is connected respectively to both the output terminals of the inverters 140, 142 to which a write current is supplied from one of the inverters 140, 142 and operated complimentarily. The EPROMs 16, 18 are operated complimentarily so that the other is turned off while on is turned on. |
