Circuit arrangement for interfacing measurement systems - uses circuits developed for logic analysis to process data such as incremental measurements with vector characteristics

摘要

Numerically proportional signals are processed in an unit: comprising a subtraction circuit (1) followed by storage in a counter (2), which may be based on fixed or variable clocking. Corresponding to the counter content, and with a control timing sequence set by a control unit (6), a pulse train is produced by a generator (3) coupled through a gating unit (4) and is fed as controlling signal for the interfacing converter (5). The output signals from the converter (5) are level discrete and time discret "z" or "not-z". The whole circuit (1.6) takes the basic form of a logic analyser. USE/ADVANTAGE - Improved accuracy in signal measurement particularly on incremental interpolated data.