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发明名称	TIMING CHECK METHOD FOR LOGIC CIRCUIT
摘要
申请公布号	JPH0239249(A)	申请公布日期	1990.02.08
申请号	JP19880190457	申请日期	1988.07.28
申请人	NEC CORP	发明人	SAKUMA HIROSHI
分类号	G06F11/25;G06F11/26;G06F17/50	主分类号	G06F11/25
代理机构		代理人
主权项
地址

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