发明名称 POWER MOS TRANSISTOR GATE CONTROL CIRCUIT
摘要 PURPOSE: To attain high speed switching by providing the gate control circuit with a means for connecting a 1st main electrode to the gate of a power MOS transistor(TR) at the time of switching the TR to ON. CONSTITUTION: A 1st switch S1 is connected between the drain and gate of a MOS TR 1 and a 2nd switch S2 is connected between a voltage source VDD and the gate of the TR 1. At the time of switching the TR 1 to an ON state, both the switches S1, S2 are simultaneously turned on and a gate charging current is impressed through a load L connected on the drain side of the TR 1. When drain voltage approaches prescribed voltage, the switch S1 is turned off but the switch S2 is held at the ON state so as to maintain the best conductive voltage of the gate of the TR 1. Consequently a current amount impressed from the gate voltage source VDD is reduced, energy is mainly supplied from main feed voltage VCC, an ON switching period is shortened, and gate capacity is charged by higher voltage.
申请公布号 JPH027713(A) 申请公布日期 1990.01.11
申请号 JP19890025581 申请日期 1989.02.03
申请人 SGS THOMSON MICROELECTRON SA 发明人 ANTOWAANU PABURAN
分类号 H01L29/78;H01L27/04;H03K17/04;H03K17/0412;H03K17/042;H03K17/567;H03K17/687 主分类号 H01L29/78
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